The present invention has been developed, in particular, for its application to objects that are treated with a solution, such as semiconductor wafers or similar substrates, whether raw, etched with any feature, coated, or integrated with conductor leads or traces as an integrated circuit device, lead frames, medical devices, disks and heads, flat panel displays, microelectronic masks, micromechanical devices, microoptical devices, and the like. These objects have become increasingly more and more difficult to treat because they are being manufactured in smaller and smaller sizes, and contain extremely small features to be generated and treated. Precision manufacturing techniques are required to properly generate such component parts. Thus, layers of various materials with low toleration for variance, and the generation of very small features at submicron size in the layers of such objects, are created by chemical treatment and etching processes. Uniformity of layers and precise quantities of treatments are required to provide the functionality of the component within the final microelectronic device.
A variety of techniques have been developed for the treatment of objects in precision manufacturing processes, particularly for treatment of semiconductor wafers. For example, semiconductor wafers may be dipped in a series of internal chambers of respective treatment vessels that provide separate treatment of the wafers. For example, the wafer may first be imparted with an oxide layer, followed by dipping in an acid bath for etching away some or all of the oxide. The acid bath may then be followed by a rinsing bath. An example of one such treatment vessel is of the type that uses cascade liquid flow processes for batch processing. In a typical cascade liquid flow process, one or more wafers are supported within a cascade processing vessel, such as within a wafer treating fixture, cassette, or other holder, to be treated at the same time. A cascade processing vessel includes an inner vessel having side walls that permit liquid to spill over the top edge and into one or more outer vessels provided about the inner vessel. A flow of liquid is supplied to the inner vessel, e.g. at the vessel bottom, to fill its internal chamber and to further cause liquid to cascade over the top edge of the internal chamber into an outer chamber. Thus, new liquid (e.g. clean water) can be supplied to rinse the wafers within the internal chamber and then to cascade from the internal chamber into the outer chamber. Liquid flows through the inner vessel during this process.
A proposed modification of wet processing methods for treatment of electronic components is provided in U.S. Pat. No. 5,817,185. See column 1, lines 46–56 and column 13, lines 31–58. The disclosure of the '185 patent describes traditional wet processing methods that use chemical(s) in the reaction chamber to displace DI water at the same temperature. This usually causes substantial mixing of the chemicals and the DI water. A claimed improvement on this process is disclosed in U.S. Pat. No. 6,245,158. The '158 patent states that mixing “causes the chemicals to be continuously diluted with water, which is undesirable since it is both environmentally preferable and cost effective to recycle the chemical solutions. In addition, it takes significantly longer to rinse when mixing occurs than if no mixing occurs.” See column 2, lines 18–36. The proposed solution of the '158 patent is to selectively control the temperature of the process liquids, such as by introducing cooler liquid from the bottom of the treatment vessel to minimize mixing of one liquid with another liquid.
In essence, thermocline principles are used to keep the liquids relatively separate from each other. Under the theory described in the '158 patent, if minimal mixing occurs, the chemical solution is quickly removed from the vessel, as in plug-flow techniques. It has been observed that true plug-flow conditions are very difficult to achieve, resulting in heterogeneous treatment of wafers. Thus, one portion of the wafer may be exposed to etchant for a longer period of time or at a different concentration than other portions of the wafer, causing a difference in performance of the wafer depending on the location of evaluation of the wafer.